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13.5. Operations
13.5.1. Initialization
The UART3 Ch.n should be initialized with the procedure shown below.
1. Assign the UART3 Ch.n input/output function to the ports. (Refer to the "I/O Ports" chapter.)
2. Set the UART3_nCLK.CLKSRC[1:0] and UART3_nCLK.CLKDIV[1:0] bits. (Configure operating clock)
3. Configure the following UART3_nMOD register bits:
UART3_nMOD.BRDIV bit
-
UART3_nMOD.INVRX bit
-
UART3_nMOD.INVTX bit
-
UART3_nMOD.PUEN bit
-
UART3_nMOD.OUTMD bit (Enable/disable USOUTn pin open-drain output)
-
UART3_nMOD.IRMD bit
-
UART3_nMOD.CHLN bit
-
UART3_nMOD.PREN bit
-
UART3_nMOD.PRMD bit
-
UART3_nMOD.STPB bit
-
UART3_nMOD.CAREN bit (Enable/disable carrier modulation function)
-
UART3_nMOD.PECAR bit
-
4. Set the UART3_nBR.BRT[7:0] and UART3_nBR.FMD[3:0] bits.
5. Set the UART3_nCAWF.CRPER[7:0] bits. (Set carrier cycle)
6. Set the following UART3_nCTL register bits:
Set the UART3_nCTL.SFTRST bit to 1.
-
Set the UART3_nCTL.MODEN bit to 1.
-
7. Set the following bits when using the interrupt:
Write 1 to the interrupt flags in the UART3_nINTF register.
-
Set the interrupt enable bits in the UART3_nINTE register to 1. * (Enable interrupts)
-
*The initial value of the UART3_nINTF.TBEIF bit is 1, therefore, an interrupt will occur immediately after
the UART3_nINTE.TBEIE bit is set to 1.
8.
Configure the DMA controller and set the following UART3 control bits when using DMA transfer:
Write 1 to the DMA transfer request enable bits in theUART3_nTBEDMAEN and
-
UART3_nRB1FDMAEN registers. (Enable DMA transfer requests)
13.5.2. Data Transmission
A data sending procedure and the UART3 Ch.n operations are shown below. Figures 13.5.2.1 and
13.5.2.2 show a timing chart and a flowchart, respectively.
Data sending procedure
1. Check to see if the UART3_nINTF.TBEIF bit is set to 1 (transmit buffer empty).
2. Write transmit data to the UART3_nTXD register.
3. Wait for a UART3 interrupt when using the interrupt.
4. Repeat Steps 1 to 3 (or 1 and 2) until the end of transmit data.
UART3 data sending operations
The UART3 Ch.n starts data sending operations when transmit data is written to the UART3_nTXD
register. The transmit data in the UART3_nTXD register is automatically transferred to the shift
register and the UART3_nINTF.TBEIF bit is set to 1 (transmit buffer empty).
The USOUTn pin outputs a start bit and the UART3_nINTF.TBSY bit is set to 1 (transmit busy). The shift
register data bits are then output successively from the LSB. Following output of MSB, the parity bit (if
parity is enabled) and the stop bit are output.
Even if transmit data is being output from the USOUTn pin, the next transmit data can be written
to the UART3_nTXD register after making sure the UART3_nINTF.TBEIF bit is set to 1.
13-6
(Select baud rate division ratio (1/16 or 1/4))
(Enable/disable USINn input signal inversion)
(Enable/disable USOUTn output signal inversion)
(Enable/disable USINn pin pull-up)
(Enable/disable IrDA interface)
(Set data length (7 or 8 bits))
(Enable/disable parity function)
(Select parity mode (even or odd))
(Set stop bit length (1 or 2 bits))
(Select carrier modulation period (H data period/L data period))
Seiko Epson Corporation
(Set transfer rate)
(Execute software reset)
(Enable UART3 Ch.n operations)
(Clear interrupt flags)
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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