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Bits 7–6
INV1B[1:0]
These bits set the oscillation inverter gain that will be applied at boost startup of the
OSC1 oscillator circuit.
Table 2.6.6 Setting Oscillation Inverter Gain at OSC1 Boost Startup
CLGOSC1.INV1B[1:0] bits
Note:
The CLGOSC1.INV1B[1:0] bits must be set to a value equal to or larger than the CLGOSC1,
INV1N[1:0] bits.
Bits 5–4
INV1N[1:0]
These bits set the oscillation inverter gain applied at normal operation of the OSC1
oscillator circuit.
Table 2.6.7 Setting Oscillation Inverter Gain at OSC1 Normal Operation
CLGOSC1.INV1N[1:0] bits
Bits 3–2
Reserved
Bits 1–0
OSC1WT[1:0]
These bits set the oscillation stabilization waiting time for the OSC1 oscillator circuit.
Table 2.6.8 OSC1 Oscillation Stabilization Waiting Time Setting
CLGOSC1.OSC1WT[1:0] bits
2-26
0x3
0x2
0x1
0x0
0x3
0x2
0x1
0x0
Oscillation stabilization waiting time
0x3
0x2
0x1
0x0
Seiko Epson Corporation
Inverter gain
Max.
↑
↓
Min.
Inverter gain
Max.
↑
↓
Min.
65,536 clocks
16,384 clocks
4,096 clocks
Reserved
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
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