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S1C31 QSPI
(memory mapped
access mode)
Figure 15.2.2.1 Connections between QSPI in Memory Mapped Access Mode and an External QSPI Slave
S1C31 QSPI
(register access
master mode)
Figure 15.2.2.2 Connections between QSPI in Register Access Master Mode and External Single-I/O SPI
S1C31 QSPI
(register access
master mode)
Figure 15.2.2.3 Connections between QSPI in Register Access Master Mode and External Dual-I/O SPI Slave
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
#QSPISSn
QSDIOn3
QSDIOn2
QSDIOn1
QSDIOn0
QSPICLKn
Device
#QSPISSn
Px1
Px2
QSDIOn1
QSDIOn0
QSPICLKn
(Legacy SPI) Slave Devices
#QSPISSn
Px1
Px2
QSDIOn1
QSDIOn0
QSPICLKn
Devices
Seiko Epson Corporation
#QSPISS
QSDIO3
QSDIO2
External QSPI
slave device
QSDIO1
QSDIO0
QSPICLK
#SPISS
SDO
SDI
SPICK
#SPISS
SDO
External single-I/O
SPI slave devices
SDI
SPICK
#SPISS
SDO
SDI
SPICK
#SPISS
SDIO1
SDIO0
SPICK
#SPISS
SDIO1
External dual-I/O
SPI slave devices
SDIO0
SPICK
#SPISS
SDIO1
SDIO0
SPICK
15-3
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