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19. 12-bit A/D Converter (ADC12A)
19.1. Overview
The ADC12A is a successive approximation type 12-bit A/D converter. The features of the ADC12A are
listed below.
•
Conversion method:
•
Resolution:
Analog input voltage range:
•
•
Supports two conversion modes:
•
Supports three conversion triggers:
•
Can convert multiple analog input signals sequentially.
•
Can generate conversion completion and overwrite error interrupts.
•
Can issue a DMA transfer request when a conversion has completed.
Figure 19.1.1 shows the ADC12A configuration.
Number of channels
Number of analog signal inputs per channel
16-bit timer used as conversion clock and trigger sources
VREFA pin (reference voltage input)
Clock
Timer
generator
16-bit timer
Ch.k
CLK_T16_k
CPU core
DMA
controller
Note
In this chapter, n, m, and k refer to an ADC12A channel number, an analog input pin
number, and a 16-bit timer channel number, respectively.
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
Successive approximation type
12 bits
Reference voltage VREFA to V
1. One-time conversion mode
2. Continuous conversion mode
1. Software trigger
2. 16-bit timer underflow trigger
3. External trigger
Table 19.1.1 ADC12A Configuration of S1C31D50
Item
Underflow
Trigger
CNVMD
select circuit
CNVTRG[1:0]
MODEN
ADSTAT[2:0]
BSYSTAT
Successive
approximation
control circuit
AD0D[15:0]
AD0CIF
AD1CIF
Interrupt
control
ADmCIF
circuit
OVIF
DMA request
control circuit
Figure 19.1.1 ADC12A Configuration
Seiko Epson Corporation
SS
S1C31D50
1 channel (Ch.0)
Ch.0: 8 inputs (ADIN00–ADIN07)
Ch.0 ← 16-bit timer Ch.7
Can be input externally
ADC12A Ch.n
ADST
STMD
SMPCLK[2:0]
VRANGE[1:0]
+
MUX
Comparator with
sample & hold circuit
-
D/A
converter
AD0CIE
AD1CIE
ADmCIE
OVIE
ADCDMAENx
#ADTRGn
ADINn0
ADINn1
ADINnm
VREFAn
19-1
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