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Epson S1C31D50 Technical Instructions page 199

Cmos 32-bit single chip microcontroller
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S1C31 QSPI
(slave mode)
External dual-I/O
SPI slave devices
Figure 15.2.2.6 Connections between QSPI in Slave Mode and External Dual-I/O SPI Master Device
S1C31 QSPI
(register access
master mode)
External QSPI
slave devices
Figure 15.2.2.7 Connections between QSPI in Slave Mode and External QSPI Master Device
S1C31D50 TECHNICAL MANUAL
(Rev. 1.00)
#QSPISSn
QSDIOn1
QSDIOn0
QSPICLKn
#SPISS
SDIO1
SDIO0
SPICK
#SPISS
SDIO1
SDIO0
SPICK
#QSPISSn
QSDIOn3
QSDIOn2
QSDIOn1
QSDIOn0
QSPICLKn
#QSPISSn
QSDIOn3
QSDIOn2
QSDIOn1
QSDIOn0
QSPICLKn
#QSPISSn
QSDIOn3
QSDIOn2
QSDIOn1
QSDIOn0
QSPICLKn
Seiko Epson Corporation
#SPISS0
#SPISS1
#SPISS2
External dual-I/O
SPI master device
SDIO1
SDIO0
SPICK
#QSPISS0
#QSPISS1
#QSPISS2
QSDIO3
External QSPI
master device
QSDIO2
QSDIO1
QSDIO0
QSPICLK
15-5

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