Section Number Title Page - ROHS MC9S08QE128 Reference Manual

Section Number
4.3 Register Addresses and Bit Assignments ........................................................................................55
4.4 Memory Management Unit .............................................................................................................63
4.4.1 Features .............................................................................................................................63
4.4.2 Register Definition ............................................................................................................63
4.4.3 Functional Description ......................................................................................................66
4.5 RAM ................................................................................................................................................69
4.6 Flash ................................................................................................................................................69
4.6.1 Features .............................................................................................................................70
4.6.2 Register Descriptions ........................................................................................................70
4.6.3 Functional Description ......................................................................................................77
4.6.4 Operating Modes ...............................................................................................................86
4.6.5 Flash Module Security ......................................................................................................86
4.6.6 Resets ................................................................................................................................88
Resets, Interrupts, and General System Control
5.1 Introduction .....................................................................................................................................89
5.2 Features ...........................................................................................................................................89
5.3 MCU Reset ......................................................................................................................................89
5.4 Computer Operating Properly (COP) Watchdog .............................................................................90
5.5 Interrupts .........................................................................................................................................91
5.5.1 Interrupt Stack Frame .......................................................................................................92
5.5.2 External Interrupt Request (IRQ) Pin ...............................................................................92
5.5.3 Interrupt Vectors, Sources, and Local Masks ....................................................................93
5.6 Low-Voltage Detect (LVD) System ................................................................................................96
5.6.1 Power-On Reset Operation ...............................................................................................96
5.6.2 Low-Voltage Detection (LVD) Reset Operation ...............................................................96
5.6.3 Low-Voltage Detection (LVD) Interrupt Operation ..........................................................96
5.6.4 Low-Voltage Warning (LVW) Interrupt Operation ...........................................................96
5.7 Peripheral Clock Gating ..................................................................................................................96
5.8 Reset, Interrupt, and System Control Registers and Control Bits ...................................................98
5.8.1 Interrupt Pin Request Status and Control Register (IRQSC) ............................................98
5.8.2 System Reset Status Register (SRS) .................................................................................99
5.8.3 System Background Debug Force Reset Register (SBDFR) ..........................................100
5.8.4 System Options Register 1 (SOPT1) ..............................................................................101
5.8.5 System Options Register 2 (SOPT2) ..............................................................................102
5.8.6 System Device Identification Register (SDIDH, SDIDL) ..............................................103
5.8.7 System Power Management Status and Control 1 Register (SPMSC1) .........................104
5.8.8 System Power Management Status and Control 2 Register (SPMSC2) .........................105
5.8.9 System Power Management Status and Control 3 Register (SPMSC3) .........................106
5.8.10 System Clock Gating Control 1 Register (SCGC1) ........................................................107
5.8.11 System Clock Gating Control 2 Register (SCGC2) ........................................................108
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Title
Chapter 5
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Page
Freescale Semiconductor