Kbi Interrupt Pin Select Register (Kbixpe); Kbi Interrupt Edge Select Register (Kbixes); Functional Description - ROHS MC9S08QE128 Reference Manual

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Chapter 7 Keyboard Interrupt (S08KBIV2)
7.3.2

KBI Interrupt Pin Select Register (KBIxPE)

7
R
KBIPE7
W
Reset:
0
Field
7:0
KBI Interrupt Pin Selects — Each of the KBIPEn bits enable the corresponding KBI interrupt pin.
KBIPE[7:0]
0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
7.3.3

KBI Interrupt Edge Select Register (KBIxES)

7
R
KBEDG7
W
Reset:
0
Field
7:0
KBI Edge Selects — Each of the KBEDGn bits serves a dual purpose by selecting the polarity of the active
KBEDG[7:0]
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.
7.4

Functional Description

Writing to the KBIPEn bits in the keyboard x interrupt pin enable register (KBIxPE) independently enables
or disables each port pin. Each port can be configured as edge sensitive or edge and level sensitive based
on the KBIMOD bit in the keyboard interrupt status and control register (KBIxSC). Edge sensitivity can
be software programmed to be either falling or rising; the level can be either low or high. The polarity of
the edge or edge and level sensitivity is selected using the KBEDGn bits in the keyboard interrupt edge
select register (KBIxES).
Synchronous logic is used to detect edges. Prior to detecting an edge, enabled port inputs must be at the
deasserted logic level. A falling edge is detected when an enabled port input signal is seen as a logic 1 (the
deasserted level) during one bus cycle and then a logic 0 (the asserted level) during the next cycle. A rising
142
6
5
KBIPE6
KBIPE5
0
0
Figure 7-3. KBI Interrupt Pin Select Register (KBIxPE)
Table 7-4. KBIxPE Register Field Descriptions
6
5
KBEDG6
KBEDG5
0
0
Figure 7-4. KBI Edge Select Register (KBIxES)
Table 7-5. KBIxES Register Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4
3
KBIPE4
KBIPE3
0
0
Description
4
3
KBEDG4
KBEDG3
0
0
Description
2
1
KBIPE2
KBIPE1
0
0
2
1
KBEDG2
KBEDG1
0
0
Freescale Semiconductor
0
KBIPE0
0
0
KBEDG0
0

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