ROHS MC9S08QE128 Reference Manual page 59

Register
Address
Name
0x007A LAP1
0x007B LAP0
0x007C LWP
0x007D LBP
0x007E LB
0x007F LAPAB
High-page registers, shown in
so they have been located outside the direct addressable memory space, starting at 0x1800.
Address Register Name
0x1800 SRS
0x1801 SBDFR
0x1802 SOPT1
0x1803 SOPT2
0x1804 – Reserved
0x1805
0x1806 SDIDH
0x1807 SDIDL
0x1808 SPMSC1
0x1809 SPMSC2
0x180A Reserved
0x180B SPMSC3
0x180C Reserved
0x180D Reserved
0x180E SCGC1
0x180F SCGC2
0x1810 DBGCAH
0x1811 DBGCAL
0x1812 DBGCBH
0x1813 DBGCBL
0x1814 DBGCCH
0x1815 DBGCCL
0x1816 DBGFH
0x1817 DBGFL
0x1818 DBGCAX
0x1819 DBGCBX
0x181A DBGCCX
0x181B DBGFX
0x181C DBGC
0x181D DBGT
0x181E DBGS
Freescale Semiconductor
Table 4-2. Direct-Page Register Summary (Sheet 4 of 4)
Bit 7 6
LA15 LA14 LA13
LA7 LA6 LA5
D7 D6
D7 D6
D7 D6
D7 D6
Table 4-3, are accessed much less often than other I/O and control registers
Table 4-3. High-Page Register Summary (Sheet 1 of 4)
Bit 7 6
POR PIN
0 0
COPE COPT
COPCLKS 0
— —
— —
— —
ID7 ID6
LVDF LVDACK
LPR LPRS
— —
LVWF LVWACK
— —
— —
TPM3 TPM2
DBG FLS
Bit 15 14
Bit 7 6
Bit 15 14
Bit 7 6
Bit 15 14
Bit 7 6
Bit 15 14
Bit 7 6
RWAEN RWA
RWBEN RWB
RWCEN RWC
PPACC 0
DBGEN ARM
TRGSEL BEGIN
AF BF
MC9S08QE128 MCU Series Reference Manual, Rev. 2
5 4
LA12 LA11
LA4 LA3
D5 D4 D3
D5 D4 D3
D5 D4 D3
D5 D4 D3
5 4
COP ILOP
0 0
STOPE —
0 0 SPI1PS
— —
— —
— — ID11
ID5 ID4
LVDIE LVDRE LVDSE
LPWUI 0 PPDF
— —
LVDV LVWV LVWIE
— —
— —
TPM1 ADC IIC2
IRQ KBI ACMP
13 12
5 4
13 12
5 4
13 12
5 4
13 12
5 4
PAGSEL 0
PAGSEL 0
PAGSEL 0
0 0
TAG BRKEN
0 0
CF 0
3 2 1
LA10 LA9
LA2 LA1
D2 D1
D2 D1
D2 D1
D2 D1
3 2 1
0 0 LVD
0 0 0
0 RSTPOE BKGDPE
ACIC2 IIC1PS
— — —
— — —
ID10 ID9
ID3 ID2 ID1
LVDE 0
PPDACK PPDE
— — —
— —
— — —
— — —
IIC1 SCI2
RTC SPI2
11 10 9
3 2 1
11 10 9
3 2 1
11 10 9
3 2 1
11 10 9
3 2 1
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
TRG
0 0 0
Chapter 4 Memory
Bit 0
LA8
LA0
D0
D0
D0
D0
Bit 0
0
BDFR
RSTPE
ACIC1
—
—
ID8
ID0
BGBE
PPDC
—
—
—
—
SCI1
SPI1
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 16
Bit 16
Bit 16
Bit 16
LOOP1
ARMF
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