ROHS MC9S08QE128 Reference Manual page 319

7
R 0
W
Reset 0
= Unimplemented or Reserved
1
BDFR is writable only through serial background mode debug commands, not from user programs.
Figure 17-6. System Background Debug Force Reset Register (SBDFR)
Field
0 Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows
BDFR an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program.
Freescale Semiconductor
6 5
0 0
0 0
Table 17-3. SBDFR Register Field Description
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4 3
0 0
0 0
Description
Development Support
2 1
0 0
BDFR
0 0
0
0
1
0
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