Internal Clock Source (S08ICSV3)
HGO
RANGE
IREFSTEN
Internal
Reference
Clock
TRIM
FTRIM
DRST IREFST CLKST OSCINIT
11.1.5
Modes of Operation
There are seven modes of operation for the ICS: FEI, FEE, FBI, FBILP, FBE, FBELP, and stop.
FLL Engaged Interna
11.1.5.1
In FLL engaged internal mode, which is the default mode, the ICS supplies a clock derived from the FLL
which is controlled by the internal reference clock. The BDC clock is supplied from the FLL.
FLL Engaged External
11.1.5.2
In FLL engaged external mode, the ICS supplies a clock derived from the FLL which is controlled by an
external reference clock. The BDC clock is supplied from the FLL.
FLL Bypassed Interna
11.1.5.3
In FLL bypassed internal mode, the FLL is enabled and controlled by the internal reference clock, but is
bypassed. The ICS supplies a clock derived from the internal reference clock. The BDC clock is supplied
from the FLL.
206
External Reference
Clock
EREFS
EREFSTEN
n
/ 2
n=0-10
RDIV
IREFS
Figure 11-2. Internal Clock Source (ICS) Block Diagram
l (FEI)
(FEE)
l (FBI)
MC9S08QE128 MCU Series Reference Manual, Rev. 1.11
ERCLKEN
IRCLKEN
CLKS
DCOOUT
LP
FLL
DCOL
Filter
DCOM
DCOH
DMX32
DRS
Internal Clock Source Block
ICSERCLK
ICSIRCLK
BDIV
n
/ 2
ICSOUT
n=0-3
ICSDCLK
ICSLCLK
/ 2
ICSFFCLK
Freescale Semiconductor