System Device Identification Register (Sdidh, Sdidl) - ROHS MC9S08QE128 Reference Manual

Field
1 IIC1 Pin Select— This bit selects the location of the SDA1 and SCL1 pins of the IIC1 module.
IIC1PS 0 SDA1 on PTA2, SCL1 on PTA3.
1 SDA1 on PTB6, SCL1 on PTB7.
0 Analog Comparator 1 to Input Capture Enable— This bit connects the output of ACMP1 to TPM1 input
ACIC1 channel 0. See
Modulator (S08TPMV3)," for more details on this feature.
0 ACMP output not connected to TPM1 input channel 0.
1 ACMP output connected to TPM1 input channel 0.
5.8.6 System Device Identification Register (SDIDH, SDIDL)
These high page read-only registers are included so host development systems can identify the HCS08
derivative. This allows the development software to recognize where specific memory blocks, registers,
and control bits are located in a target MCU.
7
R
W
Reset: —
= Unimplemented or Reserved
Figure 5-7. System Device Identification Register — High (SDIDH)
Field
7:4 Bits 7:4 are reserved. Reading these bits will result in an indeterminate value; writes have no effect.
Reserved
3:0 Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
ID[11:8] MC9S08QE128 is hard coded to the value 0x015. See also ID bits in
7
R ID7
W
Reset: 0
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
Freescale Semiconductor
Table 5-7. SOPT2 Register Field Descriptions (continued)
Chapter 9, "Analog Comparator 3V
6 5
— —
Table 5-8. SDIDH Register Field Descriptions
6 5
ID6 ID5
0 0
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Chapter 5 Resets, Interrupts, and General System Control
Description
(ACMPVLPV1)," and
4 3
ID11
— 0
Description
Table
4 3
ID4 ID3
1 0
Chapter 16, "Timer/Pulse-Width
2 1
ID10 ID9
0 0
5-9.
2 1
ID2 ID1
1 0
0
ID8
0
0
ID0
1
103