ROHS MC9S08QE128 Reference Manual page 62

Chapter 4 Memory
Address Register Name
0x187D PTETOG
0x187E– Reserved
0x187F
Several reserved flash memory locations, shown in
registers. These registers include an 8-byte backdoor key, NVBACKKEY, which can be used to gain access
to secure memory resources. During reset events, the contents of NVPROT and NVOPT in the reserved
flash memory are transferred into corresponding FPROT and FOPT registers in the high-page registers
area to control security and block protection options.
The factory ICS trim value is stored in the flash information row (IFR
ICSTRM and ICSSC registers after any reset. The internal reference trim values stored in flash, TRIM and
FTRIM, can be programmed by third party programmers and must be copied into the corresponding ICS
registers by user code to override the factory trim.
When the MCU is in active BDM, the trim value in the IFR will not be
loaded. Instead, the ICSTRM register will reset to 0x80 and the FTRIM bit
in the ICSSC register will be reset to 0.
Address Register Name
0xFFAE Reserved for
Storage of FTRIM
0xFFAF Reserved for
Storage of
ICSTRM
0xFFB0 – NVBACKKEY
0xFFB7
0xFFB8 – Reserved
0xFFBC
0xFFBD NVPROT
0xFFBE Reserved
0xFFBF NVOPT
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the flash if needed (normally through the background
1. IFR — Nonvolatile information memory that can be only accessed during production test. During production test, system
initialization, configuration and test information is stored in the IFR. This information cannot be read or modified in normal user
or background debug modes.
62
Table 4-3. High-Page Register Summary (Sheet 4 of 4)
Bit 7 6
PTETOG7 PTETOG6 PTETOG5 PTETOG4 PTETOG3 PTETOG2 PTETOG1 PTETOG0
— —
— —
Table 4-4. Reserved Flash Memory Addresses
Bit 7 6
0 0
— —
— —
— —
KEYEN
MC9S08QE128 MCU Series Reference Manual, Rev. 2
5 4 3
— — —
— — —
Table 4-4, are used for storing values used by several
1
) and will be loaded into the
NOTE
5 4 3
0 0 0
TRIM
8-Byte Comparison Key
— — —
— — —
FPS
— — —
0 0 0
2 1 Bit 0
— — —
— — —
2 1 Bit 0
0 0 FTRIM
— — —
— — —
FPOPEN
— — —
0 SEC
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