Mc9S08Qe128 Series Memory Map; Memory - ROHS MC9S08QE128 Reference Manual

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Chapter 4

Memory

4.1

MC9S08QE128 Series Memory Map

As shown in
Figure
4-1,
MCUs consists of RAM, flash program memory for nonvolatile data storage, and I/O and control/status
registers. The registers are divided into three groups:
Direct-page registers (0x0000 through 0x007F)
High-page registers (0x1800 through 0x187F)
Nonvolatile registers (0xFFB0 through 0xFFBF)
Extended Address
0x00000
When PPAGE 0 is
accessed through the
linear address pointer
or through the paging
window, the flash
memory is read.
0x03FFF
Freescale Semiconductor
Figure
4-2, and
Figure
DIRECT PAGE
PPAGE=0
REGISTERS
128 BYTES
RAM
6016 BYTES
HIGH
PAGE REGISTERS
FLASH
128 BYTES
16384 BYTES
RAM
2048 BYTES
FLASH
8064 BYTES
0x04000
PPAGE=1
FLASH
16384 BYTES
0x07FFF
0x08000
Paging Window -
Extended address-
es formed with
PPAGE and
A13:A0 of CPU ad-
dress
0x0BFFF
0x0C000
PPAGE=3
FLASH
16384 BYTES
0x0FFFF
Figure 4-1. MC9S08QE128 Memory Map
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4-3, on-chip memory in the MC9S08QE128 Series of
CPU Address
0x0000
0x007F
0x0080
0x17FF
When the CPU
accesses PPAGE 0
0x1800
directly, RAM and
registers, when present,
take priority over flash
0x187F
memory.
0x1880
0x207F
0x2080
0x3FFF
0x4000
PPAGE=2
PPAGE=1
0x7FFF
0x8000
PPAGE=0
FLASH
16384 BYTES
0xBFFF
0xC000
0xFFFF
PPAGE=7
PPAGE=6
PPAGE=5
PPAGE=4
PPAGE=3
flash
16384 BYTES
51

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