ROHS MC9S08QE128 Reference Manual page 116

Chapter 6 Parallel Input/Output Control
6.5.1.3 Port A Pull Enable Register (PTAPE)
The port A enable register (PTAPE) enables pull-ups on the corresponding PTA pin. In some cases, a
pull-down device will be enabled if pull-downs are supported by an alternative pin function, such as KBI.
7
R
PTAPE7
W
Reset: 0
1
PTAPE4 has no effect on the output-only PTA4 pin.
Field
7:0 Internal Pull Enable for Port A Bits — Each of these control bits determines if the internal pull-up or pull-down
PTAPE[7:0] device is enabled for the associated PTA pin. For port A pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port A bit n.
1 Internal pull-up/pull-down device enabled for port A bit n.
6.5.1.4 Port A Slew Rate Enable Register (PTASE)
7
R
PTASE7
W
Reset: 0
1
PTASE5 will have no effect on the input-only PTA5 pin.
Field
7:0 Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control
PTASE[7:0] is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
116
6 5
PTAPE6 PTAPE5
0 0
Figure 6-5. Internal Pull Enable for Port A Register (PTAPE)
Table 6-3. PTAPE Register Field Descriptions
6 5
1
PTASE6 PTASE5
0 0
Figure 6-6. Slew Rate Enable for Port A Register (PTASE)
Table 6-4. PTASE Register Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4 3
1
PTAPE4 PTAPE3
0 0
Description
4 3
PTASE4 PTASE3
0 0
Description
2 1
PTAPE2 PTAPE1
0 0
2 1
PTASE2 PTASE1
0 0
Freescale Semiconductor
0
PTAPE0
0
0
PTASE0
0