Sci Control Register 2 (Scixc2) - ROHS MC9S08QE128 Reference Manual

Field
3 Receiver Wakeup Method Select — Refer to
WAKE information.
0 Idle-line wakeup.
1 Address-mark wakeup.
2 Idle Line Type Select — Setting this bit to 1 ensures that the stop bit and logic 1 bits at the end of a character
ILT do not count toward the 10 or 11 bit times of logic high level needed by the idle line detection logic. Refer to
Section 14.3.3.2.1, "Idle-Line
0 Idle character bit count starts after start bit.
1 Idle character bit count starts after stop bit.
1 Parity Enable — Enables hardware parity generation and checking. When parity is enabled, the most significant
PE bit (MSB) of the data character (eighth or ninth data bit) is treated as the parity bit.
0 No hardware parity generation or checking.
1 Parity enabled.
0 Parity Type — Provided parity is enabled (PE = 1), this bit selects even or odd parity. Odd parity means the total
PT number of 1s in the data character, including the parity bit, is odd. Even parity means the total number of 1s in
the data character, including the parity bit, is even.
0 Even parity.
1 Odd parity.
14.2.3

SCI Control Register 2 (SCIxC2)

This register can be read or written at any time.
7
R
TIE
W
Reset 0
Field
7 Transmit Interrupt Enable (for TDRE)
TIE 0 Hardware interrupts from TDRE disabled (use polling).
1 Hardware interrupt requested when TDRE flag is 1.
6 Transmission Complete Interrupt Enable (for TC)
TCIE 0 Hardware interrupts from TC disabled (use polling).
1 Hardware interrupt requested when TC flag is 1.
5 Receiver Interrupt Enable (for RDRF)
RIE 0 Hardware interrupts from RDRF disabled (use polling).
1 Hardware interrupt requested when RDRF flag is 1.
4 Idle Line Interrupt Enable (for IDLE)
ILIE 0 Hardware interrupts from IDLE disabled (use polling).
1 Hardware interrupt requested when IDLE flag is 1.
Freescale Semiconductor
Table 14-3. SCIxC1 Field Descriptions (continued)
Wakeup" for more information.
6 5
TCIE RIE
0 0
Figure 14-8. SCI Control Register 2 (SCIxC2)
Table 14-4. SCIxC2 Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Serial Communications Interface (S08SCIV4)
Description
Section 14.3.3.2, "Receiver Wakeup
4 3
ILIE TE
0 0
Description
Operation" for more
2 1
RE RWU
0 0
0
SBK
0
255