Iic Control Register 2 (Iicxc2) - ROHS MC9S08QE128 Reference Manual

12.3.6

IIC Control Register 2 (IICxC2)

7
R
GCAEN
W
Reset 0
= Unimplemented or Reserved
Field
7 General Call Address Enable — The GCAEN bit enables or disables general call address.
GCAEN 0 General call address is disabled
1 General call address is enabled.
6 Address Extension — The ADEXT bit controls the number of bits used for the slave address.
ADEXT 0 7-bit address scheme
1 10-bit address scheme
2:0 Slave Address — The AD[10:8] field contains the upper three bits of the slave address in the 10-bit address
AD[10:8] scheme. This field is only valid when the ADEXT bit is set.
Freescale Semiconductor
6 5
0
ADEXT
0 0
Figure 12-8. IIC Control Register (IICxC2)
Table 12-8. IICxC2 Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4 3
0 0
0 0
Description
Inter-Integrated Circuit (S08IICV2)
2 1
AD10 AD9
0 0
0
AD8
0
227