ROHS MC9S08QE128 Reference Manual page 337

18.3.3.16 Debug Count Status Register (DBGCNT)
Module Base + 0x000F
7
R 0
W
POR
or non- 0
end-run
Reset
0
1
end-run
= Unimplemented or Reserved
1
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the CNT[3:0] bits do not change after reset.
Field
3–0 FIFO Valid Count Bits — The CNT bits indicate the amount of valid data stored in the FIFO.
CNT the correlation between the CNT bits and the amount of valid data in FIFO. The CNT will stop after a count to
eight even if more data is being stored in the FIFO. The CNT bits are cleared when the DBG module is armed,
and the count is incremented each time a new word is captured into the FIFO. The host development system is
responsible for checking the value in CNT[3:0] and reading the correct number of words from the FIFO because
the count does not decrement as data is read out of the FIFO at the end of a trace run.
Freescale Semiconductor
6 5
0 0
0 0
0 0
Figure 18-17. Debug Count Status Register (DBGCNT)
Table 18-19. DBGS Field Descriptions
Table 18-20. CNT Bits
CNT Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4 3
0
0 0
0 U
Description
Meaning
No data valid
1 word valid
2 words valid
3 words valid
4 words valid
5 words valid
6 words valid
7 words valid
8 words valid
Chapter 18 Debug Module (DBG) (128K)
2 1
CNT
0 0
U U
Table 18-20
0
0
U
shows
337