Ram; Flash - ROHS MC9S08QE128 Reference Manual

4.5

RAM

The MC9S08QE128 Series includes static RAM. The locations in RAM below 0x0100 can be accessed
using the more efficient direct addressing mode, and any single bit in this area can be accessed with the bit
manipulation instructions (BCLR, BSET, BRCLR, and BRSET). Locating the most frequently accessed
program variables in this area of RAM is preferred.
At power-on, the contents of RAM are uninitialized. RAM data is unaffected by any reset provided that
the supply voltage does not drop below the minimum value for RAM retention (V
For compatibility with M68HC05 MCUs, the HCS08 resets the stack pointer to 0x00FF. In the
MC9S08QE128 Series, it is usually best to reinitialize the stack pointer to the top of the RAM so the direct
page RAM can be used for frequently accessed RAM variables and bit-addressable program variables.
Include the following 2-instruction sequence in your reset initialization routine (where RamLast is equated
to the highest address of the RAM in the Freescale Semiconductor-provided equate file).
LDHX
TXS
When security is enabled, the RAM is considered a secure memory resource and is not accessible through
BDM or through code executing from non-secure memory. See
for a detailed description of the security feature.
4.6

Flash

The flash memory is intended primarily for program storage. In-circuit programming allows the operating
program to be loaded into the flash memory after final assembly of the application product. It is possible
to program the entire array through the single-wire background debug interface. Because no special
voltages are needed for flash erase and programming operations, in-application programming is also
possible through other software-controlled communication paths.
The flash memory is ideal for single-supply applications allowing for field reprogramming without
requiring external high voltage sources for program or erase operations. The flash module includes a
memory controller that executes commands to modify flash memory contents.
Array read access time is one bus cycle per byte. For flash memory, an erased bit reads 1 and a programmed
bit reads 0. It is not possible to read from a flash block while any command is executing on that specific
flash block. It is possible to read from a flash block while a command is executing on a different flash
block.
A flash block address must be in the erased state before being programmed.
Cumulative programming of bits within a flash block address is not allowed
except for status field updates required in EEPROM emulation applications.
For a more detailed discussion of in-circuit and in-application programming, refer to the HCS08 Family
Reference Manual, Volume I, Freescale Semiconductor document order number HCS08RMv1.
Freescale Semiconductor
#RamLast+1 ;point one past RAM
;SP<-(H:X-1)
CAUTION
MC9S08QE128 MCU Series Reference Manual, Rev. 2
RAM
Section 4.6.5, "Flash Module
MMU
Chapter 4 Memory
).
Security,"
69