Port F Registers - ROHS MC9S08QE128 Reference Manual

6.5.5.8 Port E Drive Strength Selection Register (PTEDS)
7
R
PTEDS7
W
Reset: 0
Figure 6-33. Drive Strength Selection for Port E Register (PTEDS)
Field
7:0 Output Drive Strength Selection for Port E Bits — Each of these control bits selects between low and high
PTEDS[7:0] output drive for the associated PTE pin. For port E pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port E bit n.
1 High output drive strength selected for port E bit n.
6.5.6

Port F Registers

Port F is controlled by the registers listed below.
Freescale Semiconductor
6 5
PTEDS6 PTEDS5
0 0
Table 6-31. PTEDS Register Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
4 3
PTEDS4 PTEDS3
0 0
Description
Chapter 6 Parallel Input/Output Control
2 1
PTEDS2 PTEDS1
0 0
0
PTEDS0
0
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