Hcs08 Instruction Set Summary - ROHS MC9S08QE128 Reference Manual

8.5

HCS08 Instruction Set Summary

Instruction Set Summary Nomenclature
The nomenclature listed here is used in the instruction descriptions in
Operators
( ) = Contents of register or memory location shown inside parentheses
←
= Is loaded with (read: "gets")
& = Boolean AND
| = Boolean OR
⊕
= Boolean exclusive-OR
×
= Multiply
÷
= Divide
: =
Concatenate
+ =
Add
– =
Negate (two's complement)
CPU registers
A =
Accumulator
CCR =
Condition code register
H =
Index register, higher order (most significant) 8 bits
X =
Index register, lower order (least significant) 8 bits
PC =
Program counter
PCH =
Program counter, higher order (most significant) 8 bits
PCL =
Program counter, lower order (least significant) 8 bits
SP =
Stack pointer
Memory and addressing
=
M
A memory location or absolute data, depending on addressing mode
M:M + 0x0001= A 16-bit value in two consecutive memory locations. The higher-order (most
significant) 8 bits are located at the address of M, and the lower-order (least
significant) 8 bits are located at the next higher sequential address.
Condition code register (CCR) bits
V =
Two's complement overflow indicator, bit 7
H =
Half carry, bit 4
I =
Interrupt mask, bit 3
N =
Negative indicator, bit 2
Z =
Zero indicator, bit 1
C =
Carry/borrow, bit 0 (carry out of bit 7)
CCR activity notation
– =
Bit not affected
Freescale Semiconductor
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Chapter 8 Central Processor Unit (S08CPUV4)
Table 8-2.
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