Functional Description; Iic Protocol - ROHS MC9S08QE128 Reference Manual

Inter-Integrated Circuit (S08IICV2)
12.4

Functional Description

This section provides a complete functional description of the IIC module.
12.4.1

IIC Protocol

The IIC bus system uses a serial data line (SDA) and a serial clock line (SCL) for data transfer. All devices
connected to it must have open drain or open collector outputs. A logic AND function is exercised on both
lines with external pull-up resistors. The value of these resistors is system dependent.
Normally, a standard communication is composed of four parts:
• START signal
• Slave address transmission
• Data transfer
• STOP signal
The STOP signal should not be confused with the CPU STOP instruction. The IIC bus system
communication is described briefly in the following sections and illustrated in
MSB
SCL 1 2 3
SDA AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
START CALLING ADDRESS
SIGNAL
MSB
SCL 1 2 3
SDA AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
START CALLING ADDRESS
SIGNAL
228
LSB
4 5 6 7 8 9
READ/ ACK
BIT
WRITE
LSB
4 5 6 7 8 9
READ/ ACK
BIT
WRITE
Figure 12-9. IIC Bus Transmission Signals
MC9S08QE128 MCU Series Reference Manual, Rev. 2
MSB
1 2 3 4
XXX D7 D6 D5 D4
DATA BYTE
MSB
1 2 3 4
XX AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
REPEATED NEW CALLING ADDRESS
START
SIGNAL
Figure 12-9.
LSB
5 6 7 8 9
D3 D2 D1 D0
NO STOP
ACK SIGNAL
BIT
LSB
5 6 7 8 9
NO STOP
READ/
ACK SIGNAL
WRITE
BIT
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