Status And Control Register 2 (Adcsc2) - ROHS MC9S08QE128 Reference Manual

ADCH
01000
01001
01010
01011
01100
01101
01110
01111
10.3.2

Status and Control Register 2 (ADCSC2)

The ADCSC2 register is used to control the compare function, conversion trigger and conversion active of
the ADC module.
7
R ADACT
W
Reset: 0
1
Bits 1 and 0 are reserved bits that must always be written to 0.
Field
7 Conversion Active — ADACT indicates that a conversion is in progress. ADACT is set when a conversion is
ADACT initiated and cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
6 Conversion Trigger Select — ADTRG is used to select the type of trigger to be used for initiating a conversion.
ADTRG Two types of trigger are selectable: software trigger and hardware trigger. When software trigger is selected, a
conversion is initiated following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated
following the assertion of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
Freescale Semiconductor
Figure 10-4. Input Channel Select (continued)
Input Select
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
6 5
ADTRG ACFE
0 0
= Unimplemented or Reserved
Figure 10-5. Status and Control Register 2 (ADCSC2)
Table 10-4. ADCSC2 Register Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
12-bit Analog-to-Digital Converter (S08ADCV1)
4 3
0
ACFGT
0 0
Description
ADCH Input Select
11000 AD24
11001 AD25
11010 AD26
11011 AD27
11100 Reserved
11101 V
REFH
11110 V
REFL
11111 Module disabled
2 1
0
1
R
0 0
0
1
R
0
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