Block Diagram; External Signal Description; Scl - Serial Clock Line; Sda - Serial Data Line - ROHS MC9S08QE128 Reference Manual

Inter-Integrated Circuit (S08IICV2)
12.1.5

Block Diagram

Figure 12-2 is a block diagram of the IIC.
CTRL_REG
12.2

External Signal Description

This section describes each user-accessible pin signal.
12.2.1 SCL — Serial Clock Line
The bidirectional SCL is the serial clock line of the IIC system.
12.2.2 SDA — Serial Data Line
The bidirectional SDA is the serial data line of the IIC system.
220
ADDRESS
ADDR_DECODE
FREQ_REG
INPUT
SYNC
CLOCK
CONTROL
SCL
Figure 12-2. IIC Functional Block Diagram
MC9S08QE128 MCU Series Reference Manual, Rev. 2
INTERRUPT
ADDR_REG STATUS_REG
START
STOP
ARBITRATION
CONTROL
SDA
DATA BUS
DATA_MUX
DATA_REG
IN/OUT
DATA
SHIFT
REGISTER
ADDRESS
COMPARE
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