ROHS MC9S08QE128 Reference Manual page 43

Chapter 3 Modes of Operation
3.6.1.4 RTC Considerations for Stop2
In addition, the real-time counter (RTC) can wake the MCU from stop2, if enabled.
Upon wake-up from stop2 mode, the MCU starts up as from a power-on reset (POR):
• All module control and status registers are reset, except for SPMSC1–SPMSC3, DBG trace buffer,
and RTC registers
• The CPU takes the reset vector
3.6.1.5 I/O Considerations for Stop2
In addition to the above, upon waking up from stop2, the PPDF bit in SPMSC2 is set. This flag is used to
direct user code to go to a stop2 recovery routine. PPDF remains set and the I/O pin states remain latched
until a 1 is written to PPDACK in SPMSC2.
GPIO — To maintain I/O states for pins that were configured as general-purpose I/O, the user must:
1. Before entering stop2, save the contents of the I/O registers into RAM before entering stop2.
2. Restore the contents of the I/O port registers, which have been saved in RAM, to the port registers
before writing to the PPDACK bit.
If the port registers are not restored from RAM before writing to PPDACK, then the pins will
switch to their reset states when PPDACK is written.
Peripheral I/O —For pins that were configured as peripheral I/O, the user must reconfigure the peripheral
module that interfaces to the pin before writing to the PPDACK bit.
If the peripheral module is not enabled before writing to PPDACK, the pins will be controlled by their
associated port control registers when the I/O latches are opened.
The RSTPE bit will be cleared by the stop2 recovery and should not be set
before writing to the PPDACK bit. Doing so will cause a second reset event
and the PPDF bit will be cleared at the end of the second reset.
3.6.1.6 Low-Power Oscillator Considerations for Stop2
If using the low power oscillator during stop2, the user must reconfigure the ICSC2 register which contains
oscillator control bits before PPDACK is written.
The low power (HGO=0), low range (RANGE=0) oscillator can operate in stop2 to be the clock source for
the RTC module. If the low power low range oscillator is active upon entering stop2, it will remain active
in stop2 regardless of the value of EREFSTEN. To disable the oscillator in stop2, the ICS must be switched
into FBI or FEI mode before executing the STOP instruction.
3.6.2 Stop3 Mode
Stop3 mode is entered by executing a STOP instruction under the conditions as shown in
states of all of the internal registers and logic, RAM contents, and I/O pin states are maintained.
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NOTE
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Table 3-1. The
Freescale Semiconductor