Section Number
12.4 Functional Description ..................................................................................................................228
12.4.1 IIC Protocol .....................................................................................................................228
12.4.2 10-bit Address .................................................................................................................232
12.5 Resets ............................................................................................................................................233
12.6 Interrupts .......................................................................................................................................233
13.1 Introduction ...................................................................................................................................237
13.1.2 RTC Clock Sources .........................................................................................................237
13.1.4 RTC Clock Gating ...........................................................................................................237
13.1.5 Interrupt Vector ...............................................................................................................238
13.1.6 Features ...........................................................................................................................240
13.1.7 Modes of Operation ........................................................................................................240
13.1.8 Block Diagram ................................................................................................................241
13.3 Register Definition ........................................................................................................................241
13.4 Functional Description ..................................................................................................................244
14.1 Introduction ...................................................................................................................................247
14.1.1 SCI Clock Gating ............................................................................................................247
14.1.2 Interrupt Vectors ..............................................................................................................247
14.1.3 Features ...........................................................................................................................250
14.1.4 Modes of Operation ........................................................................................................250
14.1.5 Block Diagram ................................................................................................................251
14.2 Register Definition ........................................................................................................................253
Freescale Semiconductor
Title
Chapter 13
Chapter 14
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Page
15