Memory Management Unit; Features; Register Definition - ROHS MC9S08QE128 Reference Manual

debug interface) and verifying that flash is blank. To avoid returning to secure mode after the next reset,
program the security bits (SEC) to the unsecured state (1:0).
4.4

Memory Management Unit

The memory management unit (MMU) allows the program and data space for the HCS08 Family of
microcontrollers to be extended beyond the 64K byte CPU addressable memory map. The MMU uses a
paging scheme similar to that seen on other MCU architectures, such as HCS12. The extended memory
when used for data can also be accessed linearly using a linear address pointer and data access registers.
4.4.1

Features

Key features of the MMU module are:
• Memory Management Unit extends the HCS08 memory space
— up to 4 MB for program and data space
• Extended program space using paging scheme
— PPAGE register used for page selection
— fixed 16K byte memory window
— architecture supports up to 256, 16K pages
• Extended data space using linear address pointer
— up to 22-bit linear address pointer
— linear address pointer and data register provided in direct page allows access of complete flash
memory map using direct page instructions
— optional auto increment of pointer when data accessed
— supports an 2s compliment addition/subtraction to address pointer without using any math
instructions or memory resources
— supports word accesses to any address specified by the linear address pointer when using
LDHX, STHX instructions
4.4.2 Register Definition
4.4.2.1 Program Page Register (PPAGE)
The HCS08 Core architecture limits the CPU addressable space available to 64K bytes. The address space
can be extended to 128K bytes using a paging window scheme. The Program Page (PPAGE) allows for
selecting one of the 16K byte blocks to be accessed through the Program Page Window located at
0x8000-0xBFFF. The CALL and RTC instructions can load or store the value of PPAGE onto or from the
stack during program execution. After any reset, PPAGE is set to PAGE 2.
Freescale Semiconductor
MC9S08QE128 MCU Series Reference Manual, Rev. 2
(22-bits)
(4 MB)
from 64 basic, to 128K in MC9S08QE128
Chapter 4 Memory
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