Tpm Channel Value Registers (Tpmxcnvh:tpmxcnvl) - ROHS MC9S08QE128 Reference Manual

Timer/PWM Module (S08TPMV3)
Field
4 Mode select A for TPM channel n. When CPWMS=0 and MSnB=0, MSnA configures TPM channel n for
MSnA input-capture mode or output compare mode. Refer to
controls.
Note: If the associated port pin is not stable for at least two bus clock cycles before changing to input capture
mode, it is possible to get an unexpected indication of an edge trigger.
3–2 Edge/level select bits. Depending upon the operating mode for the timer channel as set by CPWMS:MSnB:MSnA
ELSnB and shown in
ELSnA the level that will be driven in response to an output compare match, or select the polarity of the PWM output.
Setting ELSnB:ELSnA to 0:0 configures the related timer pin as a general purpose I/O pin not related to any timer
functions. This function is typically used to temporarily disable an input capture channel or to make the timer pin
available as a general purpose I/O pin when the associated timer channel is set up as a software timer that does
not require the use of a pin.
CPWMS
X
0
1
16.3.5

TPM Channel Value Registers (TPMxCnVH:TPMxCnVL)

These read/write registers contain the captured TPM counter value of the input capture function or the
output compare value for the output compare or PWM functions. The channel registers are cleared by
reset.
296
Table 16-5. TPMxCnSC Field Descriptions (continued)
Table 16-6, these bits select the polarity of the input edge that triggers an input capture event, select
Table 16-6. Mode, Edge, and Level Selection
MSnB:MSnA ELSnB:ELSnA
XX 00
00 01
10
11
01 01
10
11
1X 10
X1
XX 10
X1
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Description
Table 16-6 for a summary of channel mode and setup
Mode
Pin not used for TPM - revert to general
purpose I/O or other peripheral control
Input capture Capture on rising edge
Capture on falling edge
Capture on rising or
Output compare Toggle output on
Set output on compare
Edge-aligned High-true pulses (clear
PWM output on compare)
Low-true pulses (set
output on compare)
Center-aligned High-true pulses (clear
PWM output on compare-up)
Low-true pulses (set
output on compare-up)
Configuration
only
only
falling edge
compare
Clear output on
compare
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