ROHS MC9S08QE128 Reference Manual page 127

Field
7:0 Data Set for Port E Bits — Writing any bit to one in this location will set the corresponding bit in the data register
PTESETn to one. Writing a zero to any bit in this register has no effect.
0 Corresponding PTEDn maintains current value.
1 Corresponding PTEDn is set.
6.5.5.4 Port E Data Clear Register (PTECLR)
7
R
W PTECLR7 PTECLR6
Reset: 0
Field
7:0 Data Clear for Port E Bits — Writing any bit to zero in this location will clear the corresponding bit in the data
PTECLRn register to zero. Writing a one to any bit in this register has no effect.
0 Corresponding PTEDn maintains current value.
1 Corresponding PTEDn is cleared.
6.5.5.5 Port E Toggle Register (PTETOG)
7
R
W PTETOG7 PTETOG6
Reset: 0
Field
7:0 Toggle for Port E Bits — Writing any bit to one in this location will toggle the corresponding bit in the data
PTETOGn register. Writing a zero to any bit in this register has no effect.
0 Corresponding PTEDn maintains current value.
1 Corresponding PTEDn is inverted.
6.5.5.6 Port E Pull Enable Register (PTEPE)
The port E enable register (PTEPE) enables pull-ups on the corresponding PTE pin. In some cases, a
pull-down device will be enabled if pull-downs are supported by an alternative pin function, such as KBI.
Freescale Semiconductor
Table 6-26. PTESET Register Field Descriptions
6 5
PTECLR5 PTECLR4
0 0
Figure 6-29. Port E Data Clear Register (PTECLR)
Table 6-27. PTECLR Register Field Descriptions
6 5
PTETOG5 PTETOG4
0 0
Figure 6-30. Port E Toggle Register (PTETOG)
Table 6-28. PTETOG Register Field Descriptions
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Description
4 3
PTECLR3 PTECLR2
0 0
Description
4 3
PTETOG3 PTETOG2
0 0
Description
Chapter 6 Parallel Input/Output Control
2 1
PTECLR1 PTECLR0
0 0
2 1
PTETOG1 PTETOG0
0 0
0
0
0
0
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