ROHS MC9S08QE128 Reference Manual page 85

4.6.3.3 Illegal Flash Operations
4.6.3.3.1 Flash Access Violations
The FACCERR flag will be set during the command write sequence if any of the following illegal steps
are performed, causing the command write sequence to immediately abort:
1. Writing to a flash address before initializing the FCDIV register.
2. Writing to any flash register other than FCMD after writing to a flash address.
3. Writing to a second flash address in the same command write sequence.
4. Writing an invalid command to the FCMD register unless the address written was in a protected
area of the flash array.
5. Writing a command other than burst program while FCBEF is set and FCCF is clear.
6. When security is enabled, writing a command other than mass erase to the FCMD register when
the write originates from a non-secure memory location or from the background debug mode.
7. Writing to a flash address after writing to the FCMD register.
8. Writing to any flash register other than FSTAT (to clear FCBEF) after writing to the FCMD register.
9. Writing a 0 to the FCBEF flag in the FSTAT register to abort a command write sequence.
The FACCERR flag will also be set if the MCU enters stop mode while a program or erase operation is
active. The operation is aborted immediately and, if burst programming, any pending burst program
command is purged (see
The FACCERR flag will not be set if any flash register is read during a valid command write sequence.
If the flash memory is read during execution of an algorithm (FCCF = 0), the read operation will return
invalid data and the FACCERR flag will not be set.
If the FACCERR flag is set in the FSTAT register, the user must clear the FACCERR flag before starting
another command write sequence (see
4.6.3.3.2 Flash Protection Violations
The FPVIOL flag will be set after the command is written to the FCMD register during a command write
sequence if any of the following illegal operations are attempted, causing the command write sequence to
immediately abort:
1. Writing the program command if the address written in the command write sequence was in a
protected area of the flash array.
2. Writing the sector erase command if the address written in the command write sequence was in a
protected area of the flash array.
3. Writing the mass erase command while any flash protection is enabled.
4. Writing an invalid command if the address written in the command write sequence was in a
protected area of the flash array.
If the FPVIOL flag is set in the FSTAT register, the user must clear the FPVIOL flag before starting another
command write sequence (see
Freescale Semiconductor
Section 4.6.4.2, "Stop
Section 4.6.2.5, "Flash Status Register
Section 4.6.2.5, "Flash Status Register
MC9S08QE128 MCU Series Reference Manual, Rev. 2
Mode").
Chapter 4 Memory
(FSTAT)").
(FSTAT)").
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