14.2 Block Diagram
14.2 Block Diagram
Count clock
selection
Time base counter output
512-division of main clock
L/H selection
192
Chapter 14: 8/16-Bit PPG
Peripheral clock 16-division
Peripheral clock 8-division
Peripheral clock 4-division
Peripheral clock 2-division
Peripheral clock
Invert
PCNT
(down counter)
Reload
L/H selector
PRLL0
PRLH0
Figure 14.2a 8-bit PPG ch0 block diagram
PPG0 output enable
A/D converter
PPG0
Output latch
Clear
PEN0
S
R Q
PRLBH0
PIE0
PUF0
(Operation mode control)
PPG0
ch1-borrow
L data bus
H data bus
PPGC0
MB90580 Series
IRQ