Pdmac G-Bus Address Register (Pdmga) 0Xd208 - Toshiba TX49 TMPR4937 Manual

10.4.59 PDMAC G-Bus Address Register (PDMGA)
63
47
31
15
Bits Mnemonic Field Name
63:36 Reserved
35:2 PDMGA G-Bus Address
1:0 Reserved
Reserved
Reserved
PDMGA[31:16]
R/W
Undefined
PDMGA[15:2]
R/W
Undefined
PDMAC G-Bus Address (Default is undefined)
The G-Bus DMA transfer address is specified by a G-Bus physical address
on a 32-bit address boundary. This register value is used for G-Bus Read
access during DMA transfer from the G-Bus to the PCI Bus, or it is used for
G-Bus Write access during DMA transfer from the PCI Bus to the G-Bus.
This register value is held without being affected by a Reset.
Figure 10.4.57 G-Bus Address Register
10-90
Chapter 10 PCI Controller
0xD208
36 35
PDMGA[35:32]
Undefined
Description
48
: Type
: Initial value
32
R/W : Type
: Initial value
16
: Type
: Initial value
2 1 0
Reserved
: Type
: Initial value
Read/Write
⎯
R/W
⎯