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3.4.2 Special function register (SFR) area
The special function register (SFR) of the on-chip peripheral hardware is mapped to the area from 0FF00H to
0FFFFH (Refer to Figures 3-1 and 3-2).
The area from 0FFD0H to 0FFDFH is mapped as the external SFR area. Peripheral I/O externally connected in
the external memory expansion mode (set by the memory expansion mode register (MM)) can be accessed.
Caution In this area, do not access an address that is not mapped in SFR. If mistakenly accessed, the
CPU enters the deadlock state. The deadlock state is released only by reset input.
Remark The addresses in this text are the addresses only when the LOCATION 0H instruction is executed. If
the LOCATION 0FH instruction is executed, 0F0000H is added to the values in the text.
3.4.3 External SFR area
In the products of the µ PD784225 Subseries, the 16-byte area of the 0FFD0H to 0FFDFH area (during LOCATION
0H instruction execution, or 0FFFD0H to 0FFFDFH area during LOCATION 0FH instruction execution) in the SFR
area is mapped as the external SFR area. In the external memory expansion mode, the address bus and address/
data bus are used and the externally attached peripheral I/O can be accessed.
Since the external SFR area can be accessed by SFR addressing, the features are that peripheral I/O operations
can be simplified; the object size can be reduced; and macro service can be used.
The bus operation when accessing an external SFR area is the same as a normal memory access.
3.5 External Memory Space
The external memory space is the memory space that can be accessed based on the setting of the memory
expansion mode register (MM). The program and table data can be stored and peripheral I/O devices can be assigned.
CHAPTER 3 CPU ARCHITECTURE
User's Manual U12697EJ3V0UM
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