In Target Probe (Itp); Decoupling Recommendations - Intel 852GM Design Manual

Platform Design Checklist
14.4.2.

In Target Probe (ITP)

Pin Name
BPM[5:0]#
DBR#
RESET#
FBO
TCK
TDI
TDO
TMS
TRST#
VTAP,
VTT[1:0]
The above recommendation is only for ITP700FLEX. If using other ITP, please refer to the appropriate ITP
NOTE:
documents.
14.4.3.

Decoupling Recommendations

Signal
VCC[Vcc_core]
Decoupling guidelines are recommendations based on our reference board design. Customers will need to
NOTE:
take layout and PCB board design into consideration when deciding on overall decoupling solution.
242
System
Pull-up /Pull-down Termination
Resistor ( Ω)
51 Ω pull-up to VCCP
150-240 Ω pull-up to
V3ALWAYS
51 Ω pull-up to VCCP 150 Ω from pull-
up to
If USING ITP700FLEX
ITP700FLEX
27.4 Ω ± 1% pull-down
to gnd
150 Ω pull-up to VCCP
75 Ω pull-up to VCCP
39.2 Ω ± 1% pull-up to
VCCP
680 Ω pull-down to gnd
Connect to VCCP
Configuration
Connect to VCCP
Series
Connect to processor, with resistors placed by the
processor.
If using ITP on interporser card, then DBR#
should also be connected to DBRESET pin at the
processor.
See Notes in Section 14.4.1.
Connect to TCK pin of processor. .
Connect to processor, with resistor placed by ITP.
Connect to processor, with resistor placed by ITP.
Connect to processor, with resistor placed by ITP.
If ITP not used, this signal can be left as NC.
Connect to processor, with resistor placed by ITP.
Connect to processor.
One 0.1 µF decoupling cap is required.
Value Qty
10 µF 38 X5R/X7R, 1206 package. Use for high
frequency decoupling. Bulk decoupling
will depend on the VR solution. The
maximum Equivalent Series Resistance
should be equal to or less than 2.5 m Ω.
®
Intel 852GM Chipset Platform Design Guide
Notes
Notes
R