Clk66 Clock Group; Figure 88. Clk66 Clock Group Topology; Table 76. Clk66 Clock Group Routing Constraints - Intel 852GME Design Manual

Platform Clock Routing Guidelines
11.2.2.

CLK66 Clock Group

The 66-MHz clocks are series terminated and routed point to point on the motherboard, with dedicated
buffers for each of the loads. These clocks are all length tuned to match each other and the CLK33
clocks.

Figure 88. CLK66 Clock Group Topology

CK408

Table 76. CLK66 Clock Group Routing Constraints

Class Name
Class Type
Topology
Reference Plane
Single Ended Trace Impedance ( Zo )
Nominal Inner Layer Trace Width
Nominal Outer Layer Trace Width
Minimum Spacing (see exceptions below)
Serpentine Spacing
Maximum Via Count
Series Termination Resistor Value
Trace Length Limits – L1
Trace Length Limits – L2
Total Length Range – L1 + L2
Length Matching Required
Clock to Clock Length Matching
Breakout Region Exceptions. (Reduced spacing for GMCH &
ICH breakout region)
NOTES:
1. The overall length of CLK66 is considered the reference length for all other clocks, except USBCLK and CLK14.
The length of this clock should be set within the range and then used as the basis for defining the length of all
other length matched clocks.
198
L1
Parameter
® ®
Intel 852GME, Intel 852GMV and Intel
Rs
L2
CLK66
Individual Nets
Series Terminated Point to Point
Ground Referenced
55 ohms ± 15%
4.0 mils
5.0 mils (pin escapes only)
20 mils
20 mils
4 (per side)
33 ohms ± 5 %
Up to 500 mils (breakout segment)
4.0" to 8.5"
4.0" to 9.0"
Yes (Pin to Pin)
± 100 mils CLK66 to CLK66
5 mil trace with 5 mil space on outers
4 mil trace with 4 mil space in inners
Maximum breakout length is 0.3"
®
852PM Chipset Platforms Design Guide
R
GMCH
ICH4
Definition