Real Time Clock (Rtc), Cmos Sram, And Battery; On-Board Peripheral Components - Intel Xeon E3-1125C User Manual

With intel communications chipset 8910 development kit
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Introduction—Crystal Forest
Active Heatsink
Fan Headers
Solder Down Anchors
Heatsinks
The processor and CRB use an active heatsink design with a built-in fan, and the PCH
uses a passive heatsink. The active heatsink is powered by the platform. For details on
the processor and PCH heatsink, see the Thermal/Mechanical Design Guidelines. The
passive heatsink for the Intel
power.
Physical and Mechanical Board Specifications
The CRB is approximately 12 inches long by 12 inches wide. It provides non-plated
mounting holes with top and bottom ground rings and requires users to use the acrylic
stand provided to avoid shorts.
1.8

Real Time Clock (RTC), CMOS SRAM, and Battery

A coin-cell battery (B1B1 type CR2032) powers the real-time clock (RTC) and CMOS
memory. The battery has an estimated life of three years when it is not plugged into a
wall socket. When the platform is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSTBY applied.
If the battery and AC power fail, then at boot-up the system will prompt you to either
load optimized defaults or enter the BIOS and manually adjust the BIOS settings.
1.9

On-Board Peripheral Components

Table 4.

On-Board Peripheral Components

Ref Des
Location
U5F1/U3E1
U3A2
U2K1/U2K2
S6A1
S7A1
U1K1
DS2K1/DS2K2
October 2012
Order No.: 328009-001US
Name
The CRB provides mounting provisions and a fan header for an active
thermal solution.
The CRB provides one fan header.
The CRB provides solder down anchors for the CRB and chipset. This
includes active heatsink mounting holes.
®
Communications Chipset 89xx Series requires no
Clock Generator / Clock
Buffer
SuperI/O*
SPI Flash
Power Button
Reset Button
Port 80 Logic Device
Port 80 Code Display
®
®
Intel
Xeon
Processor E3-1125C with Intel
Description
Description
CK420 Clock Generator/ DB1900 Clock Buffer
The SIO (WPCD376I) is driven by the PCH Low Pin Count
(LPC) bus.
16 MB socket with footprint for 8-pin devices (primary boot,
®
Intel
Communications Chipset 89xx Series FW storage,
BIOS etc.)
System power button
System reset button
Altera* EPM570_100P
Two digit, 7-segment LED character displays
®
Communications Chipset 8910 Development Kit
continued...
User Guide
13

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