TDT RZ2 Manual page 35

System 3
The front panel VFD screen reports detailed information about the status of the
system. The display includes two lines. The top line reports the system mode, Run!,
Idle, or Reset, and displays heading labels for the second line. The second line
reports the user's choice of status indicators for each DSP followed by an aggregate
value.
The user can cycle through the various status indicators using the Mode button to
the bottom right of the display. Push and release the button to change the display
or push and hold the button for one second then release to automatically cycle
through each of the display options. The VFD screen may also report system status
such as booting status (Reset).
Note: When burning new microcode or if the firmware on the RZ5P is blank, the VFD
screen will report a cycle usage of 99% and the processor status lights will flash
red.
Status Indicators
Cyc:
Bus%:
I/O%:
Opt:
Important! The status lights flash when a DSP goes over its processor cycle usage limit, even
if only for a particular cycle.
PZ Preamplifier Port
The RZ5P acquires digitized signals from a PZ preamplifier or digital headstage
manifold over a fiber optic cable through the port labeled 'PZ' on the front panel.
This port can input up to 32 channels at a maximum sampling rate of ~50 kHz.
The PZ port can be used with any of the PZ preamplifiers including the PZ2, PZ3,
and PZ5 or the PZ4 digital headstage manifold.
Onboard Analog I/O
The RZ5P is equipped with four channels of 16-bit PCM D/A and four channels of
16-bit PCM A/D. All 8 channels can be accessed via front panel BNCs marked
ADC and DAC or via a 25-pin analog I/O connector. See the
information on enabling analog I/0.
Monitor Speaker
The RZ5P is equipped with an onboard speaker tied to analog output channel 9.
The speaker is provided primarily for audio monitoring of a single channel of input
during recording.
Digital I/O
24 bits of programmable digital I/O is divided into three bytes (A, B, and C) as
described in the chart below. All digital I/O lines are accessed via the 25-pin
connector on the front of the RZ5P and bits 0 - 3 of byte C are available through
Description
processing cycle usage (note: limited to 2 digits; ex: 110
displayed as 10)
percentage of internal device's bus capacity used
percentage of data transfer capacity used
Connection (sync) status of PZ amplifier
Synapse Manual
RZ5P Fiber Photometry Processor
1-29
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