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MB90335 Series
15.2.4
PPG Reload Registers (PRLL0 to PRLL3, PRLH0 to
PRLH3)
Configuration and functions of PPG reload registers (PRLL0 to PRLL3, PRLH0 to
PRLH3) are described.
■ PPG Reload Registers (PRLL0 to PRLL3, PRLH0 to PRLH3)
Figure 15.2-5 shows the bit configuration of PPG reload registers (PRLL0 to PRLL3, PRLH0 to PRLH3).
Figure 15.2-5 PPG Reload Registers (PRLL0 to PRLL3, PRLH0 to PRLH3)
ch.0 : 007900
ch.1 : 007902
ch.2 : 007904
ch.3 : 007906
ch.0 : 007901
ch.1 : 007903
ch.2 : 007905
ch.3 : 007907
R/W : Readable/Writable
X :
Undefined value
The PPG reload registers (PRLL0 to PRLL3, PRLH0 to PRLH3) are the 8-bit registers that hold the reload
values for the down counter (PCNT). Each of them has roles as shown in the following table:
Register Name
PRLL
PRLH
• Both registers can be read and written.
Note:
When different values are set for the PRLL and PRLH of the ch.0 and ch.2 using the 8-bit prescaler
+ 8-bit PPG mode, the PPG waveforms of ch.1 and ch.3 may be different each other according to
the cycle. Therefore, the same value is recommended to set for the PRLL and PRLH of the ch.0 and
ch.2.
CM44-10137-6E
H
H
bit
7
6
5
H
D07
D06
D05
H
(R/W) (R/W)
(R/W) (R/W) (R/W)
(X)
(X)
(X)
H
bit
15
14
13
H
D15
D14
D13
H
H
(R/W) (R/W)
(R/W) (R/W) (R/W)
(X)
(X)
(X)
FUJITSU MICROELECTRONICS LIMITED
4
3
2
1
D04
D03
D02
D01
(R/W)
(R/W)
(X)
(X)
(X)
(X)
12
11
10
9
D12
D11
D10
D09
(R/W)
(R/W)
(X)
(X)
(X)
(X)
Function
Hold the reload value of L side.
Hold the reload value of H side.
CHAPTER 15 8/16-BIT PPG TIMER
15.2 Registers of 8/16-bit PPG Timer
0
PRLL0 to PRLL3
D00
PPG Reload register lower
(R/W)
Read/Write
(X)
Initial value
8
PRLH0 to PRLH3
D08
PPG Reload register upper
Read/Write
(R/W)
Initial value
(X)
351
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