Keithley 2601B Reference Manual page 656

Section 7: TSP command reference
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
page E-1) and
the following table.
Bit Value
B0 status.MEASUREMENT_SUMMARY_BIT
status.MSB
B1 status.SYSTEM_SUMMARY_BIT
status.SSB
B2 status.ERROR_AVAILABLE
status.EAV
B3 status.QUESTIONABLE_SUMMARY_BIT
status.QSB
B4
status.MESSAGE_AVAILABLE
status.MAV
B5
status.EVENT_SUMMARY_BIT
status.ESB
B6 Not used
B7 status.OPERATION_SUMMARY_BIT
status.OSB
In addition to the above constants, requestEventRegister can be set to the decimal equivalent of the bits
set. When more than one bit of the register is set, requestEventRegister contains the sum of their decimal
weights. For example, if 129 is returned, bits B0 and B7 are set (1 + 128).
Bit
Binary value
Decimal
Weights
Example
requestEventRegister = status.request_event
print(requestEventRegister)
Also see
status.condition
status.system.*
Status byte and service request (SRQ)
7-316
Enable and transition registers
B7 B6
0/1 0/1
128 64
7 6
(2 ) (2 )
(on page 7-254)
(on page 7-319)
(on page E-15)
Series 2600B System SourceMeter® Instrument Reference Manual
(on page E-19). The individual bits of this register are defined in
Description
Set summary bit indicates that an enabled event in the
Measurement Event Register has occurred.
Bit B0 decimal value: 1
This bit is only available on Models
2601B/2602B/2611B/2612B/2635B/2636B. Set summary
bit indicates that an enabled event in the System Summary
Register has occurred.
Bit B1 decimal value: 2
Set summary bit indicates that an error or status message
is present in the Error Queue.
Bit B2 decimal value: 4
Set summary bit indicates that an enabled event in the
Questionable Status Register has occurred.
Bit B3 decimal value: 8
Set summary bit indicates that a response message is
present in the Output Queue.
Bit B4 decimal value: 16
Set summary bit indicates that an enabled event in the
Standard Event Status Register has occurred.
Bit B5 decimal value: 32
Not applicable
Set summary bit indicates that an enabled event in the
Operation Status Register has occurred.
Bit B7 decimal value: 128
B5 B4 B3
0/1 0/1 0/1
32 16 8
5 4 3
(2 ) (2 ) (2 )
Reads the status request event register.
Sample output:
1.29000e+02
Converting this output (129) to its binary
equivalent yields 1000 0001.
Therefore, this output indicates that the set bits
of the status request event register are presently
B0 (MSB) and B7 (OSB).
Status register set contents
B2 B1 B0
0/1 0/1 0/1
4 2 1
2 1 0
(2 ) (2 ) (2 )
2600BS-901-01 Rev. B / May 2013
(on