Keithley 2601B Reference Manual page 632

2600b series system sourcemeter instrument
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Section 7: TSP command reference
A set bit indicates the specified timer generated an action overrun because it was still processing a delay from a
previous trigger when a new trigger was received.
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
page E-1) and
the following table.
Bit
Value
B0
Not used
B1
status.operation.instrument.trigger_timer.trigger_overrun.TMR1
B2
status.operation.instrument.trigger_timer.trigger_overrun.TMR2
B3
status.operation.instrument.trigger_timer.trigger_overrun.TMR3
B4
status.operation.instrument.trigger_timer.trigger_overrun.TMR4
B5
status.operation.instrument.trigger_timer.trigger_overrun.TMR5
B6
status.operation.instrument.trigger_timer.trigger_overrun.TMR6
B7
status.operation.instrument.trigger_timer.trigger_overrun.TMR7
B8
status.operation.instrument.trigger_timer.trigger_overrun.TMR8
B9-B15
Not used
As an example, to set bit B1 of the operation status trigger timer trigger overrun enable register, set
status.operation.instrument.trigger_timer.trigger_overrun.enable =
status.operation.instrument.trigger_timer.trigger_overrun.TMR1.
In addition to the above constants, operationRegister can be set to the numeric equivalent of the bit to set.
To set more than one bit of the register, set operationRegister to the sum of their decimal weights. For
example, to set bits B1 and B4, set operationRegister to 18 (which is the sum of 2 + 16).
Bit
Binary value
Decimal
Weights
Bit
Binary value
Decimal
Weights
Example
status.operation.instrument.trigger_timer.trigger_overrun.enable =
status.operation.instrument.trigger_timer.trigger_overrun.TMR3
7-292
Enable and transition registers
B7
B6
0/1
0/1
128
64
7
6
(2
)
(2
)
B15
B14
0/1
0/1
32,768
16,384
15
14
(2
)
(2
)
Series 2600B System SourceMeter® Instrument Reference Manual
(on page E-19). The individual bits of this register are defined in
B5
B4
B3
0/1
0/1
0/1
32
16
8
5
4
3
(2
)
(2
)
(2
)
B13
B12
B11
0/1
0/1
0/1
8,192
4,096
2,048
13
12
11
(2
)
(2
)
(2
)
Status register set contents
Description
Not applicable
Bit B1 decimal
value: 2
Bit B2 decimal
value: 4
Bit B3 decimal
value: 8
Bit B4 decimal
value: 16
Bit B5 decimal
value: 32
Bit B6 decimal
value: 64
Bit B7 decimal
value: 128
Bit B8 decimal
value: 256
Not applicable
B2
B1
B0
0/1
0/1
0/1
4
2
1
2
1
0
(2
)
(2
)
(2
)
B10
B9
B8
0/1
0/1
0/1
1,024
512
256
10
9
8
(2
)
(2
)
(2
)
Uses a
constant to
set the timer
3 bit of the
operation
status trigger
timer overrun
enable
register.
2600BS-901-01 Rev. B / May 2013
(on

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