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The truth table and Karnaugh maps for sign, overflow, and
End Around Carry are shown in Figures 6 and 7. Note the
use of B S from the exclusive–OR of Add/Sub and B S . B S
eliminates Add/Sub as a variable in the truth table. As an ex-
ample of truth table generation, consider an n decade adder/
subtracter where A S = "0", B S = "1", and Add/Sub = "0". B is
in 9's complement form, 10 N – 1 – B. Thus A + (10 N – 1 – B)
= 10 N – 1 + (A – B). There is no carry when A
sign is negative (sign = "1"). When A S and B S are opposite
states and Add/Sub is a "0" (add mode), no overflow can oc-
cur (overflow = "0"). The other output states are determined
in a similar manner (see Figure 6).
From the Karnaugh maps it is apparent that End Around
Carry is composed of the two symmetrical functions S2 and
S3 of three variables with A S B S C out as the center of sym-
metry. This is the definition of the majority logic function
M 3 (ABC). Similarly the Sign is composed of the symmetrical
functions S2(3) and S3(3) but with the center of symmetry
C n
FROM C out
OF MOST SIGNIFICANT
DECADE
A1
LEAST
SIGNIFICANT
DECADE
BASIC
C in
SUBTRACT
BLOCK
C
R1
R1
Typical Subtract Time = 0.6 + 0.4n µs where n = Number of Decades
MC14560B
6–440
v
B, and the
A
V DD
A1
A2
A3
A4
C in
MC14560
S1
S2
A1
A2
C
V DD
C
MC14561
Z
F1
F2
RESULT, R
(a) Basic Subtracter Block
B1
A2
C out
C in
C
R2
(b) n–Decade Subtracter
Figure 6. Subtraction of Unsigned NBCD Numbers
translated to A S B S C out . This is equivalent to the majority
function M 3 (A S B S C out ). Further evaluation of the maps and
truth table reveal that Overflow can be generated by the
exclusive–OR function of End Around Carry and Carry Out.
This analysis results in a minimum device count consisting of
one exclusive–OR package and one dual Majority Logic
package to implement B S , EAC, Sign and Overflow. The
logic connections of these devices are shown in Figure 5.
The output sign, R S , complements the result of the add/
subtract operation when R S = "1". This is required because
the adder performs 9's complement arithmetic. Complement-
ing, when R S indicates the result is negative, restores sign
and magnitude convention.
Several variations of the adder/subtracter are possible.
For example, 9's complement is available at the output of the
NBCD adders, and output complementers are eliminated if
sign and magnitude output is not required.
B
A1
A2
A3
A4
C
MC14561
C
Z
F1
F2
F3
F4
B1
B2
B3
AB
C out
S3
S4
A3
A4
F3
F4
B2
A n
MOST
SIGNIFICANT
DECADE
C out
C in
C
R n
C n + 1
B n
C out
"0" INDICATES
UNDERFLOW
(NEGATIVE RESULT)
MOTOROLA CMOS LOGIC DATA
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