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V DD = V GS
Q16 Q32 Q48 Q64
D
C
WE
D
C
WE
Q16 Q32 Q48 Q64
V SS
(Output being tested should be in the high–logic state)
Figure 2. Typical Output Source Current
Characteristics Test Circuit
t WH
PIN NO'S
1
CLOCK 4 (12)
WRITE 3 (13)
t h1
t su1
DATA IN 7 (9)
t h1
t su1
16–BIT OUTPUT 1 (15)
t h1
17–BIT INPUT
t su1
32–BIT OUTPUT 6 (10)
t h1
33–BIT INPUT
t su1
48–BIT OUTPUT 2 (14)
49–BIT INPUT
64–BIT OUTPUT 5 (11)
CLOCK
DATA
D
Q
1
C
WRITE
ENABLE
WRITE ENABLE = 0, 16–BIT OUTPUT
WRITE ENABLE = 1, 17–BIT INPUT
MOTOROLA CMOS LOGIC DATA
V out = V OH
I OH
EXTERNAL
POWER
SUPPLY
t WL
2 2
t h0
20 ns
t su0
50%
t su0
t h0
V DD
20 ns
t su0
t h0
V DD
20 ns
t su0
V DD
t h0
20 ns
Figure 4. AC Test Waveforms
EXPANDED BLOCK DIAGRAM (1/2 OF DEVICE SHOWN)
D
D
D
Q
Q
2
16
17
C
C
C
3–STATE
WE
V DD = V GS
Q16 Q32 Q48 Q64
D
C
WE
D
C
WE
Q16 Q32 Q48 Q64
V SS
(Output being tested should be in the low–logic state)
Figure 3. Typical Output Sink Current
Characteristics Test Circuit
16
17
18
t rel
t PHL
t PLH
t TLH
t PHL
t PLH
t PHL
t TLH
t PLH
t TLH
t PHL
t PLH
t TLH
D
D
Q
Q
Q
32
33
C
C
3–STATE
WE
32–BIT OUTPUT
48–BIT OUTPUT
33–BIT INPUT
49–BIT INPUT
V out = V OL
I OL
EXTERNAL
POWER
SUPPLY
90%
19
33
50%
10%
t su
90%
50%
10%
V OH
90%
10%
V OL
t THL
V OH
90%
50%
10%
V OL
t THL
V OH
V OL
t THL
t THL
D
D
D
Q
Q
48
49
64
C
C
C
3–STATE
WE
3–STATE
64–BIT OUTPUT
HIGH IMPEDANCE
MC14517B
6–291
V DD
V SS
V DD
V SS
V DD
V SS
V DD
V SS
V DD
V SS
V DD
V SS
V DD
V SS
Q
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