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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 4-Bit Latch
The MC14508B dual 4–bit latch is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure. The
part consists of two identical, independent 4–bit latches with separate Strobe
(ST) and Master Reset (MR) controls. Separate Disable inputs force the
outputs to a high impedance state and allow the devices to be used in time
sharing bus line applications.
These complementary MOS latches find primary use in buffer storage,
holding register, or general digital logic functions where low power
dissipation and/or high noise immunity is desired.
3–State Output
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable–of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic "P and D/DW" Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic "L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
MR
ST
Disable
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
1
X
0
X
X
1
X = Don't Care
DIS
MR
ST
D n
(TO OTHER THREE LATCHES)
MOTOROLA CMOS LOGIC DATA
– 0.5 to + 18.0
– 0.5 to V DD + 0.5
– 65 to + 150
TRUTH TABLE
D3
D2
D1
D0
Q3
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
X
X
X
X
X
X
X
X
0
X
X
X
X
High Impedance
CIRCUIT DIAGRAM
Value
Unit
V
V
10
mA
500
mW
_ C
_ C
260
Q2
Q1
Q0
0
0
0
0
0
1
0
1
0
1
0
0
0
0
0
Latched
0
0
0
V DD
Q n
V SS
MC14508B
L SUFFIX
CERAMIC
CASE 623
P SUFFIX
PLASTIC
CASE 709
DW SUFFIX
SOIC
CASE 751E
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
T A = – 55 to 125 C for all packages.
BLOCK DIAGRAM
1
MR
Q0
5
2
ST
3
DIS
Q1
7
4
D0
Q2
9
6
D1
8
D2
Q3
11
10
D3
13
MR
Q0
17
14
ST
15
DIS
Q1
19
16
D0
Q2
21
18
D1
20
D2
Q3
23
22
D3
V DD = PIN 24
V SS = PIN 12
MC14508B
6–243
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