Motorola CMOS Logic Manual page 550

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MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
V DD DC Supply Voltage
V in Input Voltage, Enable (DC or Transient)
V in Input Voltage, All other Inputs
(DC or Transient)
V out Output Voltage (DC or Transient)
I in , lout Input or Output Current (DC or Transient),
per Pin
P D Power Dissipation, per Package†
T stg Storage Temperature
T L Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
"P and D/DW" Packages: – 7.0 mW/C From 65 _ C To 125 _ C Ceramic
"L" Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
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ELECTRICAL CHARACTERISTICS
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Characteristic
Output Voltage
V in = V DD or 0
V in = 0 or V DD
Input Voltage** — Enable
(V O = 4.5 or 0.5 Vdc)
(V O = 9.0 or 1.0 Vdc)
(V O = 13.5 or 1.5 Vdc)
(V O = 0.5 or 4.5 Vdc)
(V O = 1.0 or 9.0 Vdc)
(V O = 1.5 or 13.5 Vdc)
Input Voltage
Other Inputs
(V O = 4.5 or 0.5 Vdc)
(V O = 9.0 or 1.0 Vdc)
(V O = 13.5 or 1.5 Vdc)
(V O = 0.5 or 4.5 Vdc)
(V O = 1.0 or 9.0 Vdc)
(V O = 1.5 or 13.5 Vdc)
Output Drive Current
(Full — Sink Only)
(V OH = 4.6 Vdc)
(V OH = 9.5 Vdc)
(V OH = 13.5 Vdc)
(V OL = 0.4 Vdc)
(V OL = 0.5 Vdc)
(V OL = 1.5 Vdc)
Input Current
Three–State Leakage Current
Input Capacitance (V in = 0)
Quiescent Current
(Per Package)
**Total Supply Current at an
**External Load Capacitance of
**130 pF
†Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
** The formulas given are for the typical characteristics only at 25 _ C.
MC14597B MC14598B
6–512
Parameter
– 0.5 to V DD + 0.5
– 0.5 to V DD + 12
– 0.5 to V DD + 0.5
(Voltages Referenced to V SS )
V DD
DD
Vdc
Symbol
"0" Level V OL 5.0
10
15
"1" Level V OH 5.0
10
15 14.95
"0" Level V IL
5.0
10
15
"1" Level V IH
5.0
10
15
"0" Level V IL
5.0
10
15
"1" Level V IH 5.0
10
15
Source I OH
5.0
10
1 5
Sink I OL 5.0
10
15
I in 15
I TL 15
C in —
I DD 5.0
10
15
I T 5.0
10
Value Unit
– 0.5 to + 18.0 V guard against damage due to high static
voltages or electric fields. However, pre-
V
cautions must be taken to avoid applications of
V any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V in and V out should be constrained
V
to the range V SS
10 mA
appropriate logic voltage level (e.g., either V SS
or V DD ). Unused outputs must be left open.
500 mW
_ C
– 65 to + 150
_ C
260
– 55 _ C 25 _ C
Min Max Min Typ #
— 0.05 —
— 0.05 —
— 0.05 —
4.95 — 4.95 5.0
9.95 — 9.95 10
— 14.95 15
— 0.8 — 1.1
— 1.6 — 2.2
— 2.4 — 3.4
2.0 — 2.0 1.9
6.0 — 6.0 3.1
10 — 10 4.3
— 1.5 — 2.25
— 3.0 — 4.50
— 4.0 — 6.75
3.5 — 3.5 2.75
7.0 — 7.0 5.50
11 — 11 8.25
– 1.0 – – 1.0 – 2.0
— — — – 6.0
— — — – 12
1.6 — 1.6 3.2
— — — 6.0
— — — 12
— 0.1 — 0.00001
— 0.1 — 0.00001
— — — 5.0
— 5.0 — 0.005
— 10 — 0.010
— 20 — 0.015
I T = (2.0 µA/kHz) f + I DD
I T = (4.0 µA/kHz) f + I DD
I T = (6.0 µA/kHz) f + I DD
This device contains protection circuitry to
v v
(V in or V out )
Unused inputs must always be tied to an
125 _ C
Max Min Max
0 0.05 — 0.05
0 0.05 — 0.05
0 0.05 — 0.05
— 4.95 —
— 9.95 —
— 14.95 —
0.8 — 0.8
1.6 — 1.6
2.4 — 2.4
— 2.0 —
— 6.0 —
— 10 —
1.5 — 1.5
3.0 — 3.0
4.0 — 4.0
— 3.5 —
— 7.0 —
— 11 —
— – 1.0 —
— — —
— — —
— 1.6 —
— — —
— — —
0.1 — 1.0
0.1 — 3.0
7.5 — —
5.0 — 150
10 — 300
20 — 600
MOTOROLA CMOS LOGIC DATA
V DD .
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
mAdc
mAdc
µAdc
µAdc
pF
µAdc
µAdc