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Motorola CMOS Logic Manual page 68

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20 ns
20 ns
90%
V in
10%
Figure 3. Dynamic Power Dissipation Test Circuit and Waveform
GENERATOR
MC14008B
6–30
V DD
V SS
PULSE
GENERATOR
500 µF
V DD
16
B4
S4
A4
B3
S3
A3
B2
S2
A2
B1
S1
A1
PULSE
C in
C out
8
V SS
I DD
20 ns
90%
C in
50%
10%
90%
50%
S1 – S4
10%
50%
C out
t PLH
Figure 4. Switching Time Test Circuit and Waveforms
V DD
16
B4
S4
A4
B3
S3
A3
B2
S2
A2
B1
S1
A1
C in
C out
C L
8
V SS
I DD
C L
C L
C L
C L
20 ns
V DD
V SS
t PHL
t PLH
V OH
V OL
t THL
t TLH
V OH
V OL
t PHL
MOTOROLA CMOS LOGIC DATA
C L
C L
C L
C L
C L

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