Motorola CMOS Logic Manual page 308

a. Data Propagation Delay: Inputs RBI, D and LE low, and Inputs A, B, BI and LT high.
b. Inputs A, B, D and LE low, and Inputs RBI, BI and LT high.
c. Setup and Hold Times: Input RBI and D low, Inputs A, B, BI and LT high.
MC14513B
6–270
20 ns
INPUT C
t PLH t PHL
OUTPUT g
t TLH
20 ns
INPUT C
t PLH t PHL
OUTPUT RBO
50%
t TLH
20 ns
LE
10%
t su
INPUT C 50%
OUTPUT g
20 ns
90%
50%
10%
LE
t WL(LE)
d. Pulse Width: Data DCBA strobed into latches.
Figure 2. Dynamic Signal Waveforms
20 ns
V DD
90%
50%
10%
V SS
V OH
V OL
t THL
20 ns
V DD
90%
50%
10%
V SS
V OH
90%
10%
V OL
t THL
V DD
90%
50%
V SS
t h
V DD
V SS
V OH
V OL
20 ns
V DD
V SS
MOTOROLA CMOS LOGIC DATA