Motorola CMOS Logic Manual page 70

A1
C in
S1
Calculation of 16–bit adder speed:
The guaranteed 16–bit adder speed at 10 V, 25 C, C L = 50 pF is:
Figure 6. Using the MC14008B in a 16–Bit Adder Configuration
MC14008B
6–32
TYPICAL APPLICATION
WORD A + B INPUTS
B4 A1 B4
CHIP CHIP
C out C in C out
1 2
S4 S1 S4
SUM OUTPUTS
t P total = t P (Sum to Carry) + t P (Carry to Sum) + 2 t P (Carry to Carry)
t p total = 290 + 310 + 300 = 900 ns
A1 B4 A1
CHIP CHIP
C in C out C in
3 4
S1 S4 S1
MOTOROLA CMOS LOGIC DATA
B4
C out
S4