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NOTE: Data Preset Inputs (P0–P7) are "Don't Cares" while Cascade Feedback is
Table 2. Mode Controls
P7
P6
P5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
2 7
2 6
2 5
128
64
32
Counter #2
Binary
X = No Output (Always Low)
MOTOROLA CMOS LOGIC DATA
Table 1. Mode Controls (Cascade Feedback = Low)
Counter Control Values
CTL 1
CTL 2
0
0
0
1
1
0
1
1
Low.
(CTL 1 = Low, CTL 2 = Low, Cascade Feedback = High)
Preset Inputs
P4
P3
P2
P1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
0
0
1
1
1
1
2 4
2 3
2 2
2 1
16
8
4
2
Counter #1
Binary
Divide Ratio
Zero Detect
Q
256
256
160
160
160
160
100
100
Divide Ratio
Zero
Detect
P0
Q
0
256
256
1
X
X
0
2
X
1
3
X
X
X
X
1
15
X
0
16
X
X
X
X
0
32
X
X
X
X
0
64
X
X
X
X
1
127
X
0
128
128
0
136
136
1
255
255
2 0
1
Comments
Max Count
Illegal State
Min Count
Q Output Active
Bit Value
Counting
Sequence
MC14569B
6–475
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