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Motorola CMOS Logic Manual page 539

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V DD
V DD
1
A in
A out
V SS
SW1
A out
2
DIS
2
B out
B in
B out
SW2
1
V SS
Figure 1. Typical Output Source and Sink Characteristics Test Circuit
500 µF
PULSE
A in
GENERATOR 1
DIS
PULSE
B in
GENERATOR 2
A — Feedback scheme for independent threshold adjustment:
R1
POSITIVE
COMMON
R2
NEGATIVE
B — Feedback scheme for hysteresis adjustment:
POSITIVE
R1
COMMON
NEGATIVE
MOTOROLA CMOS LOGIC DATA
V out

I O
EXTERNAL
POWER
SUPPLY
V DD
0.01 µF
I D
CERAMIC
A out
A out

C L
B out
C L
B out
C L
C L
V SS
Figure 2. Power Dissipation Test Circuit and Waveforms
Figure 3. Typical Threshold Points
Output Source
Characteristics
Test
V GS = – V DD
Value
V DS = V out – V DD
Switch Position
Output
SW1
Under Test
A out , B out
1
A out , B out
2
Exclusive OR
1
f out , A in
f out , B in
C L
80
70
60
50
40
30
20
10
6 8
10 20 40
100
1.0 k
R1, R2, RESISTANCE (OHMS)
Output Sink
Characteristics
Test
V GS = V DD
Value
V DS = V out
Switch Position
SW2
SW1
SW2
1
2
2
2
1
1
2
1
1
V SS = 0
V DD = 5.0 V
V DD = 10 V
V DD = 15 V
10 k
100 k
1.0 M
MC14583B
6–501

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