Motorola CMOS Logic Manual page 140

V DD
PROGRAMMABLE
PULSE
GENERATOR
V SS
V DD
SERIAL
DATA
V DD
P/S
A/S
CLOCK
Figure 5. 16–Bit Parallel In/Parallel Out, Parallel In/Serial Out,
MC14034B
6–102
A1 A2 A3 A4 A5 A6 A7 A8
AE
P/S
D S
A/B
A/S
C
B1 B2 B3 B4 B5 B6 B7 B8
C L
C L
C L
C L
C L
C L
C L
C L
Figure 4. Power Dissipation Test Circuit and Waveforms
A1 A2 A3 A4 A5 A6 A7 A8
A ENABLE
P/S
D S
MC14034B
A/B
A/S
C B1
B2 B3 B4 B5 B6 B7 B8
Serial In/Parallel Out, Serial In/Serial Out Register
20 ns
CLOCK
t WH
90%
D S
10%
20 ns
t WH = t WL = 50% DUTY CYCLE
V DD
A1 A2 A3 A4 A5 A6 A7 A8
A ENABLE
SERIAL
P/S
DATA
D S
V DD A/B
A/S
C B1
B2 B3 B4 B5 B6 B7 B8
MOTOROLA CMOS LOGIC DATA
20 ns
V DD
90%
50%
10%
V SS
t WL
V DD
50%
V SS
20 ns
1/f
SERIAL
DATA