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R X = 100 kΩ
C X = 0.1 µF
2
1
0
– 1
– 2
– 60 – 40 – 20
0
20
T A , AMBIENT TEMPERATURE ( C)
Figure 8. Typical Error of Pulse Width
Equation versus Temperature
1
A
B
RESET
C X /R X
V ref 1
Q
TRIGGER OPERATION
The block diagram of the MC14538B is shown in Figure 1,
with circuit operation following.
As shown in Figure 1 and 10, before an input trigger
occurs, the monostable is in the quiescent state with the Q
output low, and the timing capacitor C X completely charged
to V DD . When the trigger input A goes from V SS to V DD
(while inputs B and Reset are held to V DD ) a valid trigger is
recognized, which turns on comparator C1 and N–channel
transistor N1 . At the same time the output latch is set. With
transistor N1 on, the capacitor C X rapidly discharges toward
V SS until V ref1 is reached. At this point the output of
comparator C1 changes state and transistor N1 turns off.
Comparator C1 then turns off while at the same time
MC14538B
6–370
V DD = 15 V
V DD = 10 V
V DD = 5 V
40
60
80
100
120
THEORY OF OPERATION
2
V ref 2
V ref 2
V ref 1
T
T
1
Positive edge trigger
Negative edge trigger
2
Positive edge trigger
3
Figure 10. Timing Operation
3.0
2.0
V DD = 15 V
1.0
0
V DD = 10 V
– 1.0
– 2.0
V DD = 5.0 V
– 3.0
140
– 60 – 40 – 20
0
T A , AMBIENT TEMPERATURE ( C)
Figure 9. Typical Error of Pulse Width
Equation versus Temperature
3
4
V ref 2
V ref 1
T
4
Positive edge re–trigger (pulse lengthening)
5
Positive edge re–trigger (pulse lengthening)
comparator C2 turns on. With transistor N1 off, the capacitor
C X begins to charge through the timing resistor, R X , toward
V DD . When the voltage across C X equals V ref 2 , comparator
C2 changes state, causing the output latch to reset (Q goes
low) while at the same time disabling comparator C2
ends at the timing cycle with the monostable in the quiescent
state, waiting for the next trigger.
In the quiescent state, C X is fully charged to V DD causing
the current through resistor R X to be zero. Both comparators
are "off" with total device current due only to reverse junction
leakages. An added feature of the MC14538B is that the out-
put latch is set via the input trigger without regard to the
capacitor voltage. Thus, propagation delay from trigger to Q
is independent of the value of C X , R X , or the duty cycle of the
input waveform.
R X = 100 kΩ
C X = .002 µF
20
40
60
80
100
120
5
V ref 2
V ref 1
MOTOROLA CMOS LOGIC DATA
140
. This
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